Power supply device and method for limiting an output current of a power supply device

ABSTRACT

The invention relates to a power supply device for converting an input voltage (U E ) into an output voltage (U A ), comprising at least one switching stage ( 4 ) controlled by a pulse-width modulation circuit ( 9 ) in a clocked manner, wherein a control circuit ( 8 ) is provided, which influences the pulse-width modulation circuit ( 9 ) so as to change the level of the output voltage (U A ), wherein a current limiting circuit is provided which, after a threshold has been exceeded, limits an output current (I A ) of the power supply device first to an elevated maximum current (I′ max ) for a period of time and thereafter to a regular maximum current (I max ). According to the invention, the control circuit ( 8 ) is configured such that the period of time for which the output current (I A ) is limited to the elevated maximum current (I′ max ) is dependent on the level of the output current (I A ). The invention further relates to a method for limiting the output current (I A ) of a power supply device.

The invention relates to a power supply device for converting an input voltage into an output voltage, comprising at least one switching stage which is controlled in a clocked manner by a pulse-width modulation circuit, wherein a control circuit is provided, which influences the pulse-width modulation circuit so as to change the level of the output voltage and to limit an output current of the power supply device. The invention further relates to a method for limiting an output current of a power supply device.

In a power supply device of this type, an input voltage is converted by means of the switching stage into an alternating current voltage, the frequency of which usually lies in the kilohertz range. This input-side higher frequency alternating current voltage is transformed, by means of a transformer for example, into an output-side higher frequency alternating current voltage which is lower or higher, and is then rectified again. The power supply device in this case can be embodied as a direct current converter, also called a DC/DC converter (DC=direct current), in which a direct current voltage as input voltage is converted into a direct current voltage as output voltage. The power supply device can also be embodied as a so-called switched-mode power supply device, in which a mains alternating current voltage as input voltage is rectified and then converted to an output direct current voltage.

To stabilize the output direct current voltage supplied by the power supply device, such power supply devices are equipped with a control circuit, which controls the output voltage to the most constant value possible, independently of a connected load. This can be accomplished by changing the frequency and/or the pulse width or duty factor of the clocked actuation of the switching stage in a pulse-width modulation method (PWM). For this purpose, the power supply device has a PWM switching stage, which is influenced by the control circuit.

In addition to maintaining the most constant output voltage possible, the control circuit also typically performs current limitation, in which the supplied output current is limited to a preset value by adjusting the output voltage downward once the current value is reached, so that the preset maximum current value will not be exceeded.

Particularly in the case of power supply devices that supply high currents in the range of several to several tens of amperes to power systems, such systems are provided with an overcurrent protector, for example a safety fuse or e.g. a thermal and/or magnetic overcurrent protective device, or a combination of such protective elements. The overcurrent protective device prevents components and/or leads from overheating, particularly in the event of a fault. However, safety fuses and the aforementioned thermal or magnetic overcurrent protective devices are very slow-acting and also require tripping currents, which can amount to many times the nominal current (rated current) for which the protector is designed. Power supply units that have a transformer which operates directly at the power supply unit and at the unit frequency are usually capable of supplying a sufficiently high output current, many times greater than the nominal current, at least for a sufficient period of time to ensure a reliable tripping of the protector.

With the power supply devices of the type described in the introductory part, however, the current limitation for protecting against thermal overloading of the switched-mode power supply device is typically set to approximately 1.1 to 1.5 times the nominal output current. Moreover, the current limitation of the switched-mode power supply device operates so quickly that without additional measures, the protective elements connected downstream will be tripped too late or unreliably.

To ensure the reliable tripping of a safety fuse connected downstream or a thermal or magnetic overcurrent protective device connected downstream, for example, even in the case of a clocked power supply device, document DE 10 2005 031 833 A1 discloses a power supply device in which a very high output current, which is five to ten times the nominal current, for example, can be supplied for a predetermined amount of time, and after the predetermined time has elapsed the current limitation is returned to a lower value of 1.1 to 1.5 times the nominal current, for example. The higher maximum current is available during the predetermined time for the reliable tripping of a safety fuse connected downstream or an overcurrent protective device connected downstream. Once the predetermined time has elapsed, only the maximum current that is slightly higher than the nominal current is steadily supplied. Adjusting downward to the slightly elevated maximum current prevents a thermal overload of the power supply device, in case a protective device is not provided downstream or has not been tripped. The latter can occur particularly when, in the event of a fault, although the flowing current is elevated, it is not high enough that the predetermined time is sufficient to trip the protective device. This leads to an undesirable operating state in which the elevated current continues to be supplied to the system.

It is therefore an object of the present invention to provide a power supply device having a clocked switching stage, in which an overcurrent protective device connected downstream will be tripped even in cases of an overcurrent in which the external overcurrent protective device is not tripped within the predetermined time.

This object is attained by a power supply device and a method for limiting an output current of a power supply device, having the features of the respective independent claims. Advantageous embodiments and enhancements are the subject matter of the dependent claims.

In a power supply device of the type described in the introductory part, according to the invention, the control circuit is configured such that the period of time during which the output current is limited to the elevated maximum current is dependent on the level of the output current. The elevated maximum current that flows to trip an overcurrent protective device connected downstream is therefore not available for a predetermined—and thus possibly too short—period of time, and is instead available, depending on the situation, for a period of time, the duration of which is dependent on the level of current that is flowing in the specific overcurrent case. The elevated maximum current is preferably between 5 and 10 times the nominal current of the power supply device and the regular maximum current is approximately between 1.1 times and 1.5 times the nominal current.

In an advantageous embodiment of the power supply device, the period of time is longer, the smaller the difference is between the output current and the threshold value that defines the overcurrent case during the stated period of time. For example, the threshold value can be set to the value of the regular maximum current. In this embodiment, an output current that is not as high is able to flow for a longer time in the case of a fault, until the power supply device adjusts downward from the elevated maximum current to the regular maximum current. The resulting time characteristic of the maximum current benefits the tripping of a safety fuse or a thermal or magnetic overcurrent protective device, connected downstream of the power supply device. In the case of a very high current, corresponding to 10 times the nominal current of the protective device, for example, a shorter time is required for tripping the protective device than with a lower current, corresponding to only 5 times the nominal current of the protective device, for example. Since the thermal load of the power supply device is lower with a lower maximum current than with a higher maximum current, the power supply device is able to offer this time characteristic without the risk of a thermal overload of the power supply device while the elevated maximum current is being supplied.

The time characteristic of the current limiting circuit also enables loads to be powered with a high starting current, as is typically the case with engine loads or capacitive loads. An engine starting current of around 2.5 times the nominal current of the power supply device, for example, can then be supplied for a correspondingly longer time as compared with a short-circuit with an overcurrent of 10 times the level of the nominal current, for example.

The power supply device can also be a DC/DC converter, or an AC/DC converter, e.g. a switched-mode power supply device. The latter can be embodied for connection to single-phase or multi-phase networks, e.g. 3-phase networks. The input voltages may range from 10 to 800 volts (V); nominal currents may range from several amperes to several tens of amperes (A). The elevated maximum current may be supplied by means of an energy store, for example a capacitor. However, in terms of current-carrying capacity, the power supply device may also be embodied such that the capacity for supplying output current is provided directly at the input of the power supply device.

In an advantageous embodiment of the power supply device, said device has a first comparison stage, which compares a voltage that is proportional to the output current with a first reference value, the first reference value corresponding to the level of the present maximum current. The current is thereby limited to a maximum current. The power supply device further preferably has an integrator circuit, via which the voltage, which is proportional to the output current, is supplied filtered to a second comparison stage, which compares the filtered voltage with a second reference value that corresponds to the regular maximum current, wherein an output of the second comparison stage is coupled to the first comparison stage in such a way that it influences the level of the first reference value. The set maximum current is therefore lowered from the elevated to the regular maximum value once an integration element of the integrator circuit has been “charged”. The integration results in a dynamic adjustment of the period of time during which the elevated maximum current is supplied, based on the level of current flowing in the case of a fault.

The integrator circuit preferably has a capacitor as an integration element and at least one charging and/or discharging resistor in a low-pass assembly. In this case, a charging resistor having a series-connected diode and a discharging resistor having an additional series-connected diode may be provided, the two series circuits being connected antiparallel to one another with respect to the diode or the additional diode. The time characteristic of current limitation is adjusted by means of the charging and/or discharging resistor. A common charging and discharging resistor may be used for this purpose, or alternatively separate charging resistors and discharging resistors, with the direction of current in the resistor and therefore its function (charging/discharging) being determined in each case by a series connection with the diode or the additional diode.

When, either by a tripping of the protective device connected downstream or by a correction of the fault, the output current at the output of the power supply device drops back below the regular maximum current, the capacitor will be discharged via the discharging resistor. Only after the capacitor has been discharged to below the second reference value is the elevated maximum current again available for the next fault. The time constant for the discharge can be selected by selecting the discharging resistor such that an elevated maximum current can be supplied a second time by the power supply device only after the power supply device has cooled again sufficiently. The time constant for discharging the capacitor is therefore preferably adjusted to typical time constants for cooling the power supply device. In a further preferred embodiment, a temperature-dependent resistor, in particular a PTC (positive temperature coefficient) resistor, is additionally arranged in the series circuit of the discharging resistor and the additional diode. The time constant for discharging the capacitor is thereby embodied as temperature dependent. When the temperature of the power supply device or the component to which the temperature-dependent resistor is thermally contacted is higher, the time constant for discharging the capacitor is lengthened, and therefore the regeneration time during which no elevated maximum current is supplied is lengthened when the temperature of the power supply device is elevated.

A method for limiting an output current of a power supply device, according to the invention, comprises the following steps: a current limitation for the output current is set to an elevated maximum current. When an output current that is above the threshold value is detected, the output current that lies above the threshold value but below the level of the elevated maximum current is supplied for a period of time, the length of which is dependent on the level of the detected output current. The current limitation of the output current is then adjusted to a regular maximum current that is lower than the elevated maximum current. This method can be carried out particularly in the above-described power supply device. The advantages described in connection with the power supply device according to the invention result.

In an advantageous embodiment of the method, after a further period of time, the current limitation is returned to the elevated maximum current. The duration of this additional period of time can preferably be dependent on the level of the detected output current during the time in which the current limitation is set to the regular maximum current. More preferably, the duration of the additional period of time can be dependent on a temperature measured in the power supply device.

In an advantageous embodiment of the method, the duration of the period of time and optionally of the additional period of time is determined by an integration of a voltage that represents the output current. The integration results in a simple manner in a suitable time characteristic for the dependence of the duration of the time period or of the additional time period on the level of current that is flowing. A current that does not remain constant for the duration of the time period is also taken into consideration. The integration over the current essentially also describes the thermal load to which the power supply device is exposed during the period of overcurrent. The duration of the time period during which a current that is above the regular maximum current can be supplied can therefore be adjusted to the set temperature of the power supply device or the temperature-critical components thereof during this time period.

In the following, the invention will be described in greater detail in the context of embodiment examples, with reference to the figures. The figures show:

FIG. 1 a schematic circuit diagram of a power supply device;

FIG. 2 a detailed circuit diagram of a portion of a control circuit of the power supply device, in one embodiment example; and

FIG. 3 a detailed circuit diagram of a portion of a control circuit of the power supply device in a further embodiment example.

FIG. 1 shows a block circuit diagram of a switched-mode power supply device 1, as an example of a power supply unit. Switched-mode power supply device 1 of FIG. 1 is provided for converting an input voltage U_(E), in this case an input alternating current voltage, into an output voltage U_(A), in this case an output direct current voltage.

Input voltage U_(E) is converted by means of a rectifier 2 into a pulsing direct current voltage U₁, which is smoothed and/or filtered by means of a smoothing assembly 3. For this purpose, smoothing assembly 3 has a first smoothing capacitor C₁. Alternatively, an active power factor correction circuit (PFC=power factor correction) may also be used as rectifier 2.

Direct current U₁ is fed in a clocked manner to a primary-side (I) winding of a transformer 5, via a switching stage 4 having a switching element 41. Switching stage 4 converts direct current voltage U₁ into a higher frequency alternating current voltage U₂, the frequency of which is significantly higher than the frequency of input alternating current voltage U_(E).

Alternating current voltage U₃ is converted by transformer 5 into a smaller (or in certain applications also greater) amount of secondary-side (II), higher frequency alternating current voltage U₃. The secondary-side, higher frequency alternating current voltage U₃ is then rectified again in a secondary-side rectifier 6 into a secondary-side direct current voltage and is smoothed and/or filtered in a secondary-side smoothing assembly 7. For this purpose, the secondary-side smoothing assembly 7 in this case has an additional smoothing capacitor C₂, by way of example. In principle, however, more complex circuits comprising a plurality of particularly discrete components (not shown) for the secondary-side smoothing assembly 7 are preferred.

The output voltage of secondary-side smoothing assembly 7 is output voltage U_(A) of power supply device 1, which in this case is positive relative to a reference potential GND.

In order for output voltage U_(A) to remain stable even with a changing load 10, a control circuit 8 is provided, which compares output voltage U_(A) with a reference voltage and, based on this comparison, influences a pulse-width modulation (PWM) circuit 9. PWM circuit 9 controls switching stage 4 and modifies the clock parameters, in particular a timing ratio, but optionally also a timing frequency, of switching stage 4, based on the data from control circuit 8, thereby influencing output voltage U_(A). Thus a control circuit is formed by which output voltage U_(A) is held at a desired, predetermined value.

In addition to this voltage control, a current control is also provided, in which process a current I_(A) flowing at the output of switched-mode power supply device 1 and delivered to load 10 is measured by a current sensor 81, and the control circuit is configured to limit current I_(A) by lowering voltage U_(A) to a specifiable maximum current. Current sensor 81 can be arranged as shown here, upstream of smoothing assembly 7 or between said assembly and load 10, without any significant impact on the method of functioning. Details of the current limitation by means of control circuit 8 will be described below in reference to FIGS. 2 and 3.

A switched-mode power supply device 1 of this type frequently also has a filter (not shown), which is used for filtering input alternating current voltage U_(E) prior to rectification, in order to filter out harmonics, overvoltages and/or mains-borne interferences.

On the secondary side, transformer 5 may also have a plurality of secondary windings (not shown), which may be used to generate secondary-side alternating current voltages of various levels. In this embodiment of switched-mode power supply device 1, a plurality of rectifiers 6 and smoothing assemblies 7 would then be provided for each of the different secondary-side alternating current voltages.

FIG. 2 shows a portion of control circuit 8 of switched-mode power supply device 1 in greater detail. Illustrated here is the circuit for current limitation within control circuit 8. The circuit for voltage control in a switched-mode power supply device of this type is known in principle and therefore will not be described in greater detail in this application.

Control circuit 8 has an evaluation amplifier 82 for the signal of current sensor 81. Evaluation amplifier 82 is connected to current sensor 81 and has an output, where a voltage that is proportional to measured current I_(A) is output. A shunt resistor may act as current sensor 81, in which case the voltage drop at the shunt resistor is a measure of flowing current I_(A). Alternatively, a Hall sensor may be used for current measurement.

The voltage signal emitted by evaluation amplifier 82 is fed to a first comparison stage 83, which has an operational amplifier 831 as comparator. The signal which is proportional to output current I_(A) is fed to the non-inverting input of operational amplifier 831, whereas a first comparison voltage, which in the present case is generated from a reference voltage U_(ref) and a voltage divider, is fed to the inverting input. For this purpose, the inverting input of operational amplifier 831 is connected via a resistor 832 to a reference voltage source and is also connected via a further resistor 833 to reference potential GND.

In addition, the inverting input of operational amplifier 831 is further connected via an additional resistor 834 to an output of a second comparison stage 84. Initially, it is assumed that the output of the second comparison stage 84 is at a positive reference potential relative to reference potential GND. In this case, the potential at the inverting input of operational amplifier 831 results from reference voltage U_(ref) via resistor 832 or from the stated positive potential and the additional resistor 834 on one hand, and the additional resistors 833 on the other. The resistance values or potentials are selected in this case such that, at the output of operational amplifier 831—and therefore of first comparison stage 83—a positive potential is established when output current I_(A) of switched-mode power supply device 1 is greater than or equal to a specified elevated maximum current I′_(max). Current I′_(max) is selected in this case as a high current in the range of five to ten times the output nominal current I_(nenn) of switched-mode power supply device 1.

When a positive potential is present at the output of first operational amplifier 831, a light-emitting diode of an optocoupler 86 is switched on via a voltage drop resistor, not shown in greater detail in the figure, wherein optocoupler 86 influences the voltage control branch of control circuit 8, not shown here, causing a decrease in output voltage U_(A). Switched-mode power supply device 1 is thereby limited by first control circuit 83, via optocoupler 86, to elevated maximum current I′_(max).

Second comparison stage 84 likewise has an operational amplifier 841 as comparator, to which a second reference value is fed at a non-inverting input. This second reference value is formed in relation to reference potential GND from reference voltage U_(ref) by means of a voltage divider comprising resistors 842 and 843. The value that will be compared with this reference value is fed to the inverting input of operational amplifier 841.

Second comparison stage 84 supplies at its output the abovementioned positive voltage value when the input voltage of second comparison stage 84 is below the second reference value. If the voltage at the input of second comparison stage 84 exceeds the second reference value, a negative potential or, depending on the supply voltage of operational amplifier 841, reference potential GND, will be output at the output of second comparison stage 84. The first reference value present at the inverting input of operational amplifier 831 of first comparison stage 83, via resistor 834, is dependent upon the potential at the output of second comparison stage 84.

More specifically, when the second reference value is exceeded at the input of second comparison stage 84, the current limitation is decreased from the specified elevated maximum current I′_(max) to a regular maximum current I_(max). Thus the interconnection of the two comparison stages 83, 84 results in a limitation of output current I_(A) either to elevated maximum current I′_(max) or to regular maximum current I_(max). Regular maximum current I_(max) can be determined by the selection of the resistance values of resistors 832, 833 and 834 and by the potentials present at the output of operational amplifier 841 of second comparison stage 84. Regular maximum current I_(max) is advantageously set to a value within the range of 1.1 to approximately 1.5 times the output nominal value I_(nenn) of switched-mode power supply device 1.

The switchover between the two maximum currents I′_(max), I_(max) is implemented by means of an integrator circuit 85, which is connected upstream of the input of second comparison stage 84. On the input side, integrator circuit 85 is connected to the output of evaluation amplifier 82, and is thus supplied the voltage that is proportional to output current I_(A) in the same manner as the input of first comparison stage 83.

Integrator circuit 85 has a charging resistor 851 which is connected to the input, and which is connected via a diode 852 to a capacitor 855 that is connected to reference potential GND. Parallel to charging resistor 851 and diode 852, a branch having a series circuit comprising a discharging resistor 853 and an additional diode 854 is connected. The additional diode 854 is arranged in the opposite direction from diode 852. Integrator circuit 85 is thus configured as a low-pass circuit, however capacitor 855, and therefore the output of integrator circuit 85, is charged to a potential which is positive in relation to reference potential GND via charging resistor 851, and capacitor 855 is discharged via discharging resistor 853. By properly selecting the resistance values for resistors 851 and 853, different time constants for the charging and discharging of capacitor 855 may be selected. In principle, a circuit comprising only one common charging and discharging resistor is also conceivable, which would result in equal time constants for the charging and discharging of the resistor. In addition, parallel to capacitor 855 an additional discharging resistor 856 is arranged, which has a high resistance value relative to charging resistor 851 and discharging resistor 853, and which serves substantially to discharge capacitor 855 even when switched-mode power supply device 1 is switched off.

During operation of switched-mode power supply device 1, the output of integrator circuit 85 substantially follows the voltage supplied at the output of evaluation amplifier 82 and reflecting output current I_(A). In the event of a fault, for example a short-circuit at the output of switched-mode power supply device 1, output current I_(A) will increase from a value below output nominal current I_(nenn) to a maximum of the elevated maximum value I′_(max), which is adjusted at first comparison stage 83, since the voltage at the output of integrator circuit 85 is at first lower than the second reference voltage.

This voltage at the output of integrator circuit 85 follows the voltage jump at the output of evaluation amplifier 82 only slowly, namely with the time constant determined by the resistance value of charging resistor 851 and the capacitance of capacitor 855. As long as the output of integrator circuit 85 remains below the second reference value, the current limitation will remain at elevated maximum value I′_(max). Once it exceeds the second reference value, the current limitation is lowered to regular maximum current I_(max). The switched-mode power supply device then optionally remains steadily in this state.

In the event of a fault, if output current I_(A) increases to a current value that is above regular maximum current I_(max) but does not reach elevated maximum current I′_(max), it will take correspondingly longer before the voltage at the output of integrator circuit 85 exceeds the second reference value. Therefore, in the event of a fault, an output current I_(A) that is not as high can continue to flow for a longer time before switched-mode power supply device 1 is adjusted downward from elevated maximum current I′_(max) to regular maximum current I_(max). This results in a time dependence of the maximum supplied output current, which is dependent on output current level I_(A).

This characteristic has an advantageous effect on the tripping of a safety fuse or of a thermal or magnetic overcurrent protective device, connected downstream of switched-mode power supply device 1. In the case of a very high current, corresponding to 10 times the nominal current of the protective device, for example, less time is required for tripping the protective device than with a lower current that is only 5 times the nominal current of the protective device, for example. Since the thermal load is lower with a lower maximum current for switched-mode power supply device 1 than with a higher maximum current, switched-mode power supply device 1 is able to supply this time characteristic without risk of a thermal overload of switched-mode power supply device 1 while the elevated maximum current is being supplied.

The time characteristic of the current limiting circuit also enables the powering of loads with a high starting current, as is typically the case with engine loads or capacitive loads. An engine starting current of around 2.5 times the nominal current of the power supply device, for example, can then be supplied for a correspondingly longer time as compared with a short-circuit with an overcurrent of 10 times the level of the nominal current.

When output current I_(A) at the output of switched-mode power supply device 1 drops back below regular maximum current I_(max), either due to a tripping of the protective device downstream or by a correction of the fault, capacitor 855 is discharged via additional diode 854 and discharging resistor 853. When capacitor 855 is discharged below the second reference value, the next time a fault occurs the elevated maximum current I′_(max) will again be initially available. The time constant for discharge can be selected by selecting resistor 853 such that switched-mode power supply device 1 is able to supply an increased maximum current again only after switched-mode power supply device 1 has cooled sufficiently. The time constant for discharging capacitor 855 is therefore preferably adapted to typical time constants for cooling switched-mode power supply device 1.

In the same manner as FIG. 2, FIG. 3 shows a further embodiment example of a portion of control circuit 8 of a switched-mode power supply device 1 according to the invention. Similar or similarly functioning elements are identified in this embodiment example by the same reference signs. In terms of its basic structure, the circuit shown in FIG. 2 corresponds to the circuit shown in FIG. 2, the description of which is provided herewith.

In contrast to the embodiment example of FIG. 2, an additional discharging resistor 857 is provided in the discharge branch of integrator circuit 85, within the series circuit of additional diode 854 and discharging resistor 853, said additional discharging resistor having a temperature-dependent resistance value, and being particularly formed by a PTC (positive temperature coefficient) resistor. The additional discharging resistor 857 changes its resistance value based on the temperature of switched-mode power supply device 1, in particular based on the temperature of a component, the temperature of which changes dramatically dependent on the load, for example the temperature of the output-side rectifier stage 6. The time constant for discharging the capacitor 855 is therefore temperature dependent. When the temperature of switched-mode power supply device 1 or the component with which the additional discharging resistor 857 is in thermal contact is higher, the time constant for discharging the capacitor 855 is lengthened. Therefore, when switched-mode power supply device 1 is at an elevated temperature, the regeneration time available to switched-mode power supply device 1, during which switched-mode power supply device 1 cannot supply an elevated maximum current I′_(max), is lengthened.

LIST OF REFERENCE SIGNS

-   1 switched-mode power supply device -   2 rectifier -   3 smoothing assembly -   4 switching stage -   41 switching element -   5 transformer -   6 output-side rectifier -   7 output-side smoothing assembly -   8 control circuit -   81 current sensor -   82 evaluation amplifier -   83 first comparison stage -   84 second comparison stage -   85 integrator circuit -   86 optocoupler -   831 operational amplifier -   832 to 834 resistor -   841 operational amplifier/comparator -   842, 843 resistor -   851 charging resistor -   852 diode -   853 discharging resistor -   854 additional diode -   855 capacitor -   9 PWM circuit -   10 load -   C₁, C₂ smoothing capacitor -   U_(E) input voltage -   U_(A) output voltage -   U₁ direct current voltage -   U₂ primary voltage -   U₃ secondary voltage -   U_(ref) reference voltage -   GND reference potential -   I primary side of the transformer/network component -   II secondary side of the transformer/network component -   I_(nenn) output nominal current -   I_(max) regular maximum current -   I′_(max) elevated maximum current 

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 15. A switched-mode power supply arrangement for converting an input voltage (U_(E)) to an output voltage (U_(A)), comprising: (a) a transformer (5) having primary (I) and secondary (II) windings; (b) at least one switching stage circuit (4) for supplying said input voltage (U_(E)) to said transformer primary winding, thereby causing said secondary winding to produce an output current (I_(A)) and an output voltage (U_(A)), said switching stage circuit including a switching element (41); (c) a pulse-width modulation circuit (9) connected with said switching stage switching element for controlling in a clocked manner the operation of said switching stage circuit; and (d) a control circuit (8) controlling the operation of said pulse-width modulation circuit to vary the level of the output voltage (U_(A)), said control circuit including: (1) means for establishing a threshold level; and (2) a current limiting circuit operable when said threshold level has been exceeded by a voltage signal that is a function of the output current (I_(A)) to limit for a first period of time the output current to an elevated maximum current (I′_(max)), and thereafter to limit the output current to a regular maximum current (I_(max)), said first period of time being dependent on the level of said output current (I_(A)).
 16. A switched-mode power supply arrangement as defined in claim 15, wherein the longer said first period of time exists, the smaller is the difference between said first voltage signal (V₁) and said first threshold value during said first period of time.
 17. A switched-mode power supply arrangement as defined in claim 16, wherein said current limiting circuit includes: (a) a first comparison circuit (83) for comparing said first voltage signal (V₁) with said first reference voltage (V_(ref1)), thereby to produce an output voltage signal (V₄) that controls the operation of said pulse-width modulation circuit, and thereby control the level of said output voltage (U_(A)).
 18. A switched-mode power supply arrangement as defined in claim 17, wherein said current limiting circuit further includes: (b) an integrator circuit (85) for filtering said first voltage signal (V₁) to produce a second voltage signal (V₂); (c) a second comparison circuit (84) for comparing said second voltage signal (V₂) with a second reference voltage (V_(ref2)) corresponding with said regular maximum current (I_(max)), thereby to produce a third voltage signal (V₃) that is supplied as an input to said first comparison circuit (83), thereby to influence the operation of said first comparison circuit.
 19. A switched-mode power supply arrangement as defined in claim 18, wherein said integrator circuit comprises a low-pass filter arrangement including at least one charging/discharging resistor (856) and a capacitor (855).
 20. A switched-mode power supply arrangement as defined in claim 18, wherein said integrator circuit (85) includes a first branch including a charging resistor (851) connected in series with a first diode (852) having a first polarity, and a second branch connected in parallel with said first branch, said second branch including a discharging resistor (853) connected in series with a second diode (854) of the opposite polarity.
 21. A switched-mode power supply arrangement as defined in claim 20, and further including a temperature-dependent resistor (857) connect in series in said second branch.
 22. A switched-mode power supply arrangement as defined in claim 15, wherein said input voltage (U_(E)) has a range of from between about 10 volts to about 800 volts.
 23. A switched-mode power supply arrangement as defined in claim 15, wherein said input voltage (U_(E)) has a range of from about 15 volts to about 265 volts.
 24. A switched-mode power supply arrangement as defined in claim 15, wherein said input voltage (U_(E)) is an alternating-current voltage, and said output voltage (UA) is a direct-current voltage.
 25. A switched-mode power supply arrangement as defined in claim 15, wherein said output current normally has a nominal current value (I_(nom)), and further wherein said elevated maximum current (I′_(max)) is between 5 to 10 times said nominal current value, and said regular maximum current (I_(max)) is between 1.1 and 1.5 times said nominal current (I_(nom)).
 26. A switched-mode power supply arrangement for converting an input voltage to an output voltage, comprising: (a) a transformer (5) having primary (I) and secondary (II) windings; (b) at least one switching stage circuit (4) for supplying said input voltage (U_(E)) to said transformer primary winding, thereby causing said transformer secondary winding to produce an output current (I_(A)) and an output voltage (U_(A)), said switching stage circuit containing a switching element (41); (c) a pulse-width modulation circuit (9) connected with said switching stage switching element for controlling in a clocked manner the operation of said switching stage circuit; and (d) a control circuit (8) controlling the operation of said pulse-width modulation circuit to vary the level of the output voltage (U_(A)), said control circuit including: (1) a first comparison stage (83) including: (a) a first operational amplifier (831) having an output terminal connected with said pulse-width modulation circuit, and a pair of input terminals; and (b) a first reference voltage (V_(ref1)) connected with a first one of said first operational amplifier input terminals; (2) means (81, 82) for applying to a second input terminal of said first operational amplifier a first voltage signal (V₁) that is a function of the output current (I_(A)), whereby upon the occurrence of an overload, an elevated maximum current (I′_(max)) is permitted; (3) an integrator circuit (85) for generating from said first voltage signal (V₁) a time-integrated second voltage signal (V₂); (4) a second comparison stage (84) including: (a) a second operational amplifier (841) having an output terminal connected with said first operational amplifier first input terminal, and a pair of input terminals; and (b) a second reference voltage (V_(ref2)) connected with a first input terminal of said second operational amplifier, the second input of said second operational amplifier being connected with said integrator circuit to receive said time-integrated second voltage signal (V₂), thereby to produce a third voltage signal (V₃) at the output terminal of said second operational amplifier that influences the operation of said first operational amplifier; (5) said control circuit being operable when the threshold level established by said second reference voltage has been exceeded to limit for a first period of time the output current at the elevated maximum current (I′_(max)), and thereafter to limit the output current to a regular maximum current (I_(max)), said first period of time being dependent on the level of said output current (I_(A)).
 27. A method for limiting the output current (I_(A)) of a switched-mode power supply system (1) having a transformer with primary and secondary windings (I and II), and a switching stage (4) containing a switching component (41), including: (a) establishing an elevated maximum output current (I′_(max)); (b) detecting an output current (I_(A)) that is above a first threshold value; (c) supplying an output current (I_(A)) that is above the threshold value but below the level of the elevated maximum current for a first period of time the length of which is dependent on the level of the detected output current (I_(A)); and (d) adjusting the current limitation for the output current (I_(A)) to a regular maximum current (I_(max)) which is lower than the elevated maximum current (I′_(max)).
 28. The method defined in claim 27, and further including: (e) returning the current limitation to the elevated maximum current (I′_(max)) after an additional time period has elapsed.
 29. The method as defined in claim 28, wherein the duration of the additional period of time is dependent on the level of the detected output current (I_(A)) during the time in which the current limitation is set to the regular maximum current (I_(max)).
 30. The method as defined in claim 29, wherein the duration of the first period of time and of the additional period of time are determined by the integration of a voltage signal (V₁) corresponding with the output current (I_(A)). 